In our previous article, High Performance from Industrial SSD (part 1), we briefly outlined the difference between the three tiers of solid state drives (SSDs) – consumer-grade, commercial-grade, and industrial-grade.
In this article, we will explain these differences in more detail. Our goal is to understand what makes industrial-grade SSDs more suitable for critical and rugged environments versus their less-expensive counterparts. Spoiler alert: it all comes down to fewer errors and longer life-expectancy.
Explanation of ‘Single-Level Cell’ (SLC) vs. ‘Multi-Level Cell’ (MLC) SSD Technology
In solid-state data storage, a bit-value is written as a charge-value (voltage) on the control gate of a solid state cell. This programmed charge is compared to a threshold voltage to determine the status of the bit (‘0’ or ‘1’).
SLC technology stores one bit per cell, whereas MLC technology stores multiple bits on a single cell. MLC achieves this by defining multiple threshold voltages within the same voltage range.
In other words, if the voltage range of the cell is 5 volts, an SLC may have a voltage threshold of 2.5V. If the reader sees a voltage above 3V, it will read that cell (bit) as a ‘1’. If it sees a voltage below 2.5V, it will read that bit as ‘0’.
MLC achieves more bits per cell by defining multiple threshold voltages within the same voltage range. If the technology is 2 bits per cell, then the cell must allow for 4 states (00, 01, 10, 11). Each of these states is programmed by applying a voltage between corresponding thresholds (00 = 0 – 1.2V; 01 = 1.2 – 2.4V; 10 = 2.4 – 3.6V; 11 = 3.6 – 5V).
Error and Failure
- Program disturb
- Read disturb
- Charge trapping
‘Program disturb‘ and ‘Read disturb‘ are a result of the proximity and organization of the cells on a silicon wafer. The charge (i.e., programmed voltage, or ‘bit value’) being programmed or stored on neighboring cells can affect the charge in the cells nearby. All SSD technology suffers from this error, although more economic modes of organization will suffer more (cost-to-performance tradeoff).
‘Leakage‘ is the phenomenon of electrons leaking from the floating gate of a cell. In other words, a cell will lose its charge over a period of time. Higher operating temperatures increase the rate of leakage.
‘Charge trapping’ is the phenomenon of electrons getting ‘trapped’ in the cell, which creates a permanent shift in the threshold voltage. When too many electrons become trapped in the cell, it reaches a critical voltage bias, and the cell can no longer be programmed and read accurately. The lifespan of an SSD cell is usually limited by this phenomenon. This becomes especially critical in applications where large amounts of data are continuously being written to the drive.
‘Charge trapping’ is unique among these error mechanisms, as it causes permanent error within the cell. In other words, any error caused by ‘Program/read disturb’ and ‘Leakage’ is reset upon each programming cycle. On the other hand, ‘Charge trapping’ causes accumulative hysteresis, eventually resulting in cell ‘failure and retirement’.
Because single-level cell (SLC) technology offers wider allowable voltage ranges (i.e., more tolerance for noise/error), single-level cells (SLC) have far fewer errors and a much longer life-expectancy versus their MLC counterparts (10 to 30 times more endurance).
Write (Program) Speed
SLC also achieves a write speed two to three times faster then MLC. The explanation behind the increase in write speed would require a much more in-depth article. However, we encourage you to compare the ‘Program Performance’ on SCL and MCL specification sheets.